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WCDMA Quasi-Direct Modulator
with VGA and PA Driver
Register Definition
The MAX2395 includes three programmable, 20-bit
registers consisting of two divide registers and an oper-
ational control register. These registers are pro-
grammed from the SPI/ MICROWIRE-compatible serial
port. The 4 least significant bits (LSBs) are reserved for
the register ’s address. The register bits have been
assigned to allow sharing of the 3-wire bus with the
MAX2390/MAX2391/MAX2392/MAX2401 receiver ICs.
The 16 most significant bits (MSBs) are used for regis-
ter data. Data is shifted in MSB first, followed by the 4-bit
address. When CS is low, the clock input is active and
data is shifted with the rising edge of the clock. When CS
transitions to high, the shift register is latched into the
register selected by the contents of the address bits.
Power-up defaults for the three registers are shown in
Table 2. Initialize the registers according to the charac-
terization table (Table 1).
The RFM register sets the main frequency divide ratio
for the RF PLL. The RFR register sets the reference fre-
quency divide ratio. The RF VCO frequency is deter-
mined by the following:
RF VCO frequency = f REFin (RFM/RFR)
where f REFin is the external input reference frequency
for the MAX2395.
The operational control register (OPCTRL) controls the
state of the IC. See Table 3 for the function of each bit.
The RFR divide register includes test bits B9 –B15.
These bits are used to troubleshoot the VCO and syn-
thesizer section (see Table 4). These bits are not need-
ed for normal use and should be left as the values at
power-up.
The device offers several different operation modes for
conserving power. Table 5 explains how to implement
each mode.
Shutdown and Idle Mode?
The part offers a shutdown mode and idle mode for opti-
mal power management. In shutdown mode, all functions
are turned off except the serial interface. When the part
is shut down using the OPCTRL register, the IC draws a
residual current of 60μA (typ). In idle mode, the VCO,
PLL, and serial interface remain on to minimize startup
time. The GmC filter can be software programmed to
power on or off during idle mode (see Table 5).
Idle Mode is a trademark of Maxim Integrated Products, Inc.
Applications Information
External Matching to PA
The Tx outputs are internally matched to 50 ? . The
open-collector output requires a pullup inductor to V CC .
The selection of matching in the MAX2395 Evaluation
Kit allows optimization of ACPR.
Electromagnetic Compliance
Considerations
Two major concepts should be employed to produce a
low-spur and EMC-compliant transmitter: Minimize cir-
cular current-loop area to reduce H-field radiation, and
minimize losses. To minimize circular current-loop area,
bypass as close to the device as possible and use the
distributed capacitance of a ground plane. To minimize
losses, make RF traces short.
Program only the necessary bits in any register to mini-
mize clock cycles. RC filtering can also be used to slow
the clock edges on the 3-wire interface, reducing high-
frequency spectral content. RC filtering also provides for
transient protection against IEC 802 testing by shunting
high frequencies to ground, while the series resistance
attenuates the transients for error-free operation. The
same applies to the logic-input pins ( SHDN , IDLE ).
High-frequency bypass capacitors are required close
to the pins with a dedicated via to ground. The pack-
age provides minimal inductance ground by using an
exposed pad under the part. Provide at least five low-
inductance vias under the pad to ground to minimize
ground inductance. Use a solid ground plane wherever
possible. Any cutout in the ground plane may act as a
slot radiator and reduce its shield effectiveness.
Layout Issues
The MAX2395 Evaluation Kit can be used as a refer-
ence for board layout. Gerber files are available upon
request at www.maxim-ic.com.
To minimize coupling between different sections of the
IC, the ideal power-supply layout is a star configuration,
which has a large decoupling capacitor at a central V CC
node. The V CC traces branch out from this node, each
going to a separate V CC node in the circuit. At the end
of each trace is a bypass capacitor with impedance to
ground less than 1 ? at the frequency of interest. This
arrangement provides local decoupling at each V CC
pin. Use at least one via per bypass capacitor.
8
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